The present invention relates to semiconductor packages and methods of manufacturing the same. More particularly, the present invention relates to semiconductor packages including molded semiconductor chips that may be electrically connected to an external device, and methods of manufacturing semiconductor packages including molded semiconductor chips that may be electrically connected to an external device.
Generally, semiconductor memory devices may be classified as volatile memory devices or non-volatile memory devices. Volatile memory devices may have a relatively rapid data input/output rate, but may lose data over time. The non-volatile memory devices may have a relatively slow data input/output rate, but may continuously store data for significant periods of time, even when no power is applied to the device.
Non-volatile memory devices may be classified as NAND type flash memory devices or NOR type flash memory devices depending on their cell layout. The NAND type flash memory devices may include unit strings where cell transistors may be serially connected to each other. The unit strings may be serially connected between a bit line and a ground line. In contrast, the NOR type flash memory devices may include cell transistors connected in parallel with each other between a bit line and a ground line.
The NAND type flash memory device may include a plurality of gate structures in a cell transistor, ground selection lines, string selection lines and common source lines arranged at peripheries of the gate structures. The gate structure may include a gate electrode and a channel region under the gate electrode.
A voltage may be applied to the common source lines in the periphery of the cell transistor to move carriers through the channel region. When the voltage is applied to the channel region in the gate structures of the cell transistors, the carriers may be moved through the channel region to store or erase data.
However, when the temperature at which the memory device is operated is increased, the mobility of lattices in the channel region may be increased. Because the lattices may interrupt the movements of the carriers, the mobility of the carriers may be decreased. As a result, an operational current of the memory device may be reduced.